EDN

It’s Hot: CMOS Logic Circuits

Abstract: What can be simpler than designing with CMOS and BiCMOS? These technologies are very easy to use but they still require careful design. This tutorial discusses the odd case of circuits that ...
EDN

CMOS-Based Logic Probe Circuit

The circuit was designed to create a handy logic probe that can show off the logic states for high, low and pulsing outputs with the use of CMOS 4001 integrated circuit. Logic Probe – a handheld probe ...
Nature

Low Power Design in CMOS and FinFET Logic Circuits

Low power design has become a cornerstone of modern integrated circuit development, driven by energy efficiency demands and the challenges of scaling in nanometre technologies. Innovations in ...
Nature

Current-Mode Logic and Low-Power CMOS Technology

Current-Mode Logic (CML) and low-power Complementary Metal-Oxide-Semiconductor (CMOS) technology continue to drive significant advances in digital circuit design, particularly in high-speed and energy ...
Design-Reuse

Sidense offers One-Time-Programmable (OTP) macro in UMC's 130nm Logic CMOS process

Ottawa, Canada – January 9th, 2005 – Sidense Corp. announced today that it has developed an embedded non-volatile memory (NVM) intellectual property (IP) core, targeted towards UMC’s 130nm ...
Design-Reuse

Javelin Semiconductor chooses Kilopass Non Volatile Memory Intellectual Property Core for MIPI RFFE Digital Interface in Next-Generation CMOS Power Amplifiers

Santa Clara, Calif., June 26, 2012 –– Kilopass Technology Inc., a leading provider of semiconductor logic non-volatile memory (NVM) intellectual property (IP), today announced that Javelin ...
Semiconductor Engineering

A Closer Look At One-Time Programmable Embedded Memory

Being the first month of the year, chip designers have probably reflected on 2015 and are thinking ahead to upcoming projects this year. They want to produce a product that reflects tomorrow’s needs ...
Electronic Design

It’s Hot, Powering, And Burning CMOS Logic Circuits

Fig 1. A typical CMOS input circuit comprises a “P” and “N” transistor. One is fully “on” for logic high, and the other is “on” for a logic low. Fig 2. When a CMOS input pin is at logic high or low ...