Electronics Weekly

Imec shows Si-passivated Ge nMOS gate stack

Imec has demo-ed a silicon-passivated germanium nMOS gate stack with dramatically reduced interface defect density (DIT) reaching the same level as a Si gate stack and with high mobility and reduced ...
Semiconductor Engineering

The History Of CMOS

Since CMOS has been around for about 50 years, a comprehensive history would be a book. This blog focuses on what I consider the major transitions. Before CMOS, there was NMOS (also PMOS, but I have ...
Nature

P-type NiOX dielectric-based CMOS inverter logic gate using enhancement-mode GaN nMOS and diamond pMOS transistors

The Nature Index 2024 Research Leaders — previously known as Annual Tables — reveal the leading institutions and countries/territories in the natural and health sciences, according to their output in ...
EDN

Logic 101 – Part 2 – Positive vs Negative Logic

1. Logical versus arithmetic views of a digital function. Having said this, it is generally preferable to employ a single consistent format to cover both cases, and it is easier to view logical ...
Semiconductor Engineering

The Good Kind Of Bias

Back gating, body bias, substrate bias, and back bias all refer to a technique for dynamically adjusting the threshold voltage of a CMOS transistor. CMOS transistors are often thought of as ...