The introduction of high-density ASICs and multimillion-gate FPGAs has brought with it a new class of signal integrity problems, both on-chip and off. On-chip parasitic extraction and interconnect ...

SANTA CRUZ, Calif. — Promising to speed signal-integrity analysis for chip, package and board applications, Sigrity Inc. has ported its power and signal integrity tools to 64-bit Linux platforms.

Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs ...

In today’s ever-shrinking IC package design cycles, it is almost imperative that we catch and correct routing issues as early as possible, which makes simulation an integral part of the design cycle.

At process technologies of 0.13 µm and smaller, achieving timing closure for system-on-a-chip (SoC) designs becomes a slippery goal. Ever-tinier interconnects are packed closer together, yielding ...

Signal integrity is a critical design consideration in modern electronic systems, particularly those that depend on high-speed interconnects. As data rates climb and interconnect geometries become ...

Analyzing high speed datacom interfaces is an important task and ensures signal integrity. One major challenge of this analysis is the connection between the physical interface and the oscilloscope, ...

Chiplets have generated a lot of interest in recent years as design engineers look for alternatives to traditional system-on-chip technology to house complex, multi-function electronics. At the ...